With high-speed developments of the semiconductor industry, the integration density of semiconductor devices are constantly improved, which continuously scales down the device dimensions, enhances device performance, and declines manufacturing costs. As the integration density increases, the field effect transistor (FET) undergoes three-dimensional transformation to become the fin-like field effect transistor (FinFET), while the interconnect structure on the substrate is developed into the multi-layer metallization layers. In the formation of both the FET and the interconnect structure, metal materials such as tungsten manifests critical functions. The metal materials are not only used for gap filling of the FET to form a gate stack, but also used to form wires in the interconnect structures for electrical connections through trenches or vias in the interlayer dielectric layers.
However, with the constant scaling down of the device dimensions, the widths of a gap of a gate, a via, or a trench are also constantly decreasing, which results in more and more challenges for metal materials to fully fill in a recess feature including a gap of a gate, a via, or a trench. Thus, enhancements in filling of metal materials such as tungsten into a recess feature are required to improve the overall performance of semiconductor devices.